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Model 53821 3-Ch 200 MHz A/D with DDC & 2-Ch 800 MHz D/A with DUC, Kintex UltraScale - 3UVPX

This product is no longer available. Please see Model 52821 or 54821.

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  • Complete radar and software radio interface solution
  • Supports Xilinx Kintex UltraScale FPGAs
  • Three 200 MHz 16-bit A/Ds
  • Three multiband DDCs (digital downconverters)
  • One DUC (digital upconverter)
  • Two 800 MHz 16-bit D/As
  • 5 GB of DDR4 SDRAM
  • Sample clock synchronization to an external system reference
  • LVPECL clock/sync bus for multimodule synchronization
  • PCI Express (Gen. 1, 2 & 3) interface up to x8
  • Optional LVDS and gigabit serial connections to the FPGA for custom I/O
  • Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)
  • Ruggedized and conduction-cooled versions available

 

Model 53821

Jade Xilinx Kintex UltraScale FPGA Family Brochure
Jade Xilinx UltraScale
 

Model 53821 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram


Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

A complete set of user manuals is provided in HTML format. Access to detailed documentation of the IP Core modules and their programmable registers is only available in the HTML version of the operating manual. Instructions for getting the HTML version of the user manuals is provided in the User Manual Library document listed below.

Part No.
Type
Description
Revision/Date
800.48145 User's Guide Navigator BSP for Jade User's Guide - Windows & Linux 3.0 (11/27/2019)
800.71821 Operating Manual 3-Ch 200 MHz A/D, 2-Ch 800 MHz D/A with DDCs, DUC Jade Family XMC Module 1.3 (3/28/2018)



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