Pentek Doubles Down on Preconfigured A/D XMC Modules for Radar, Communications and Data Acquisition Applications

  • 3 or 4 channel 200 MHz 16-bit A/D converter
  • Digital down converter (DDC), interpolation and beamforming IP
  • GateFlow Design Kit for Xilinx Virtex-7 FPGA custom IP development
  • Advanced GateXpress technology for FPGA reconfiguration across PCIe
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Upper Saddle River, NJ - September 30, 2014 - Pentek, Inc., today announced the newest members of its highly popular Onyx® family of high-speed data converter XMC FPGA modules: the 3-channel Onyx Model 71721 and the 4-channel Onyx Model 71761, 200 MHz 16-bit A/D XMC modules based on the high density Xilinx Virtex-7 FPGA. Each has a programmable digital down converter and a suite of built-in programmable cores.

"These modules hit the current sweet spot for performance and functionality with their built-in IP cores that eliminate costly development effort," said Bob Sgandurra, Pentek's director of Product Management. "The increased space for IP in the Virtex-7 also leaves plenty of additional room for customer supplied applications."

A/D Converter Stage

Each module has a front end A/D converter stage that accepts three (Model 71721) or four (Model 71761) analog HF or IF inputs on front panel SSMC connectors, each transformer-coupled to Texas Instruments ADS5485 200 MHz, 16-bit A/D converters. The 200 MHz sampling rate handles the needed bandwidth for a wide range of signal processing applications. The Model 71721 also includes a two-channel 16-bit 800 MHz D/A converter.

Performance IP Cores

The Model 71721 and Model 71761 come preconfigured with a suite of built-in functions for digital down conversion, data capture, synchronization, time tagging, and formatting, making them ideal turn-key interfaces for radar, communications, or general data acquisition applications. An A/D acquisition IP module is included for easy data capture, and delivery to system memory.

The Model 71721 and 71761 each feature a complete beamforming subsystem. The DDC core contains programmable I & Q phase and gain adjustments followed by a power meter that continuously measures the individual average power output. The time constant of the averaging interval for each meter is programmable up to 8K samples. The power meters present average power measurements for each DDC core output in easy-to-read registers. A threshold detector automatically sends an interrupt to the processor if the average power level of any DDC core falls below or exceeds a programmable threshold.

A programmable summation block sums any of the four DDC core outputs, with a power meter, threshold detector and a programmable gain stage to compensate for bit growth. The sum can be selected for output across PCIe. Alternatively, for larger systems, local sums from several boards can be aggregated via a built-in Xilinx Aurora gigabit serial interface, daisy- chained through the P16 XMC connectors.

The Model 721 also includes a waveform generation IP core and a programmable interpolation filter to support digital upconversion within the D/A.

Boosting Performance with the Onyx Architecture

Building upon the proven design in the Cobalt Virtex-6 family, architectural enhancements in the Onyx family include a doubling of the DDR3 memory in both size and speed to 4 GB and 1600 MHz, respectively. The PCIe interface has been upgraded to Gen 3, delivering peak transfer rates up to 8 GB/sec. The Virtex-7 is more power efficient than previous generations making it easier to utilize larger FPGAs. Optional LVDS and gigabit serial connections to the Virtex-7 are available for connecting to custom high performance I/O.

Development Tools and Software Support

GateXpress® PCIe Configuration Manager is a sophisticated FPGA-PCIe hardware engine for managing FPGA reconfiguration. At power up, the GateXpress manager immediately presents a PCIe target to the host computer for discovery and enumeration, giving the FPGA time to load from FLASH. Once booted, the GateXpress manager offers multiple options for dynamically reconfiguring the FPGA with a new IP image, handling the hardware negotiation and streamlining the loading task. GateXpress also allows dynamic FPGA reconfiguration though software commands as part of the runtime application.

For systems that require custom functions, IP can be developed using the Pentek GateFlow® FPGA Design Kit, extending or even replacing the factory-installed functions. Software support packages are available for Linux and Windows operating systems.

Form Factors

The Model 71721 and Model 71761 XMC modules are designed for both rugged and lab environments and are available in CompactPCI (Models 73721 & 73761), AMC (Models 56721 & 56761), PCIe (Models 78721 & 78761) and VPX (Models 53721 & 53761).

Pricing and Availability

For the latest pricing, delivery and available options, please fill out this form and your request will be delivered to the appropriate department. To learn more about our products or to discuss your specific application please email our sales department at, contact your local representative or Pentek directly:

Mario Schiavone
Sales Director
Pentek, Inc.
One Park Way
Upper Saddle River, NJ 07458
Tel: +1 (201) 818-5900
Fax: +1 (201) 818-5904
Map + Directions

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