|Home > What's New > Upper Saddle River, NJ - August 26, 2013||Printer Friendly Version|
Upper Saddle River, NJ - August 26, 2013 - Pentek, Inc., today introduced the Model 71610 digital I/O module with LVDS (low-voltage differential signaling) I/O connected to a Virtex-6 FPGA. This Cobalt® module provides 32 LVDS differential input or output pairs plus LVDS clock, data valid and flow control signals via an easy access front panel 80-pin connector routed to the Virtex-6 FPGA.
LVDS is a general purpose digital interface operating at very high speeds over inexpensive twisted-pair or flat ribbon copper cables. It is popular for many common control or data capture applications such as high-speed video, graphics, video camera data transfers, and general purpose computer buses. The standard built-in data capture and data generation facilities of the Model 71610 make it an ideal turnkey solution for developing and deploying custom FPGA processing algorithms.
Data can be pulled from devices such as sensors, data converters, custom digital system, or spectrum analyzers, and then processed, decoded or formatted in the Virtex-6 FPGA before delivery to the host system processor. Likewise, signals from the host can be processed and formatted by the FPGA before delivery to the LVDS output.
"The LVDS interface gives developers a low-level interface that is highly configurable to handle many types of unique interface requirements," said Rodger Hosking, vice president of Pentek. "This module is ideal for implement custom I/O, which can be tailored to match a wide range of different LVDS peripheral devices."
The Model 71610 is a VITA 42 XMC (switched mezzanine card) module that can plug into carriers such as VPX, CompactPCI, AMC (Advanced Mezzanine Card), and PCI Express. The Model 71610 supports x4 PCIe on the primary P15 XMC connector. The secondary P16 XMC connector supports dual 4X or single 8X user-installed gigabit serial interfaces, such as Aurora, PCIe or Serial RapidIO. The Model 71610 has an optional PMC P14 connector with 20 pairs of LVDS connections to the FPGA for custom I/O to the carrier.
Multiple Virtex-6 FPGA options are available so developers can select the best match for their processing and environmental requirements. The Virtex-6 is ideal for encoding/decoding, modulation/demodulation, encryption/decryption, and channelization of signals between transmission and reception. 2GB of DDR3 SDRAM provides ample memory buffer space for transient capture, digital delays, DMA packet formation, and signal processing algorithms.
Pentek GateFlow FPGA Design Kits allow users to develop and install their own custom IP for data processing. The kits include full VHDL source code for factory installed intellectual property (IP) functions, so developers can easily add new functions by incorporating additional FPGA IP modules.
Pentek's ReadyFlow board support packages, with high-level C-callable library functions and device drivers, are available for Windows and Linux operating systems.
For the latest pricing, delivery and available options, please fill out this form and your request will be delivered to the appropriate department. To learn more about our products or to discuss your specific application please email our sales department at email@example.com, contact your local representative or Pentek directly:
One Park Way
Upper Saddle River, NJ 07458
Tel: +1 (201) 818-5900
Fax: +1 (201) 818-5904
Map + Directions
|CONNECT ON SOCIAL:|