The VITA Radio Transport Protocol for SDR Architectures

The VITA Radio Transport (VRT) protocol is an emerging standard for Software Defined Radio (SDR) applications. It was developed to provide interoperability between diverse SDR components by defining a transport protocol to convey digitized signal data and receiver settings. The VRT provides an infrastructure to maintain accurate alignment of signal data and discrete events between multiple receivers that are either in the same location or separated by large distances.

Dramatic changes occurring in high-performance radio and signal processing architectures are the result of improved performance and smaller packages of RF and digital receiver components. The changes enable reconfigurable SDR architectures to be deployed for applications once dominated by custom architectures. The emergence of this new technology has led the industry to look for new standards to leverage this capability.

The VRT protocol addresses these requirements by defining a transport packet with unique data and context information. The signal data packets support most digitizers and signal processing formats. The context packets convey information about the internal SDR settings such as frequency, bandwidth, gain and delay and also convey spatial information. Both packet types support time stamping so that data from multiple receivers can be aligned in time to enable coherent and synchronous processing. With these features, the VRT standard makes it possible to correlate information from different SDR providers to enhance signal detection and location capabilities. It thus eliminates dependency upon a single source for receiver and DSP equipment.

VRT Protocol Benefits

The VRT standard does not define the architecture of the signal processing devices. As a result, the equipment vendor is free to define the architecture based on a variety of technologies including ASICs, FPGAs, DSPs, and general purpose PCs. The equipment can be deployed for many radio applications such as signal surveillance, radar, electronic warfare and wireless communications. The capabilities of modern receivers and signal processors make it possible to develop generic products to meet the requirements of all these applications. The commonalities of these types of SDR include:

  • One or more high performance analog tuners
  • Integrated digital receiver functions including digital downconversion (DDC), channelization, digital spectrum processing, and signal detection
  • Dynamic routing of signals within a receiver to the digital receiver resources
  • Accurate time stamping of data
  • Ability to send one or more of the digital receiver channels out over an industry-standard physical link, most often serialized clock and data.

VRT Packet Features

The VRT standard resolves the problem of interoperability among SDR applications by providing a rich set of features for data and context packets that can be used for a wide range of applications. VRT provides for the interconnection of radio system components through data structures instead of hard wiring. This allows systems to be synchronized using modern gigabit distribution paths — rather than a wired connection — and facilitates applications such as synthetic aperture radar, direction finding, and beamforming.

Figure 1 shows the structure of the IF data packet. The first word is a header that’s common to the IF data and the context packet. The header contains information about the packet type, option bits, a rolling counter and the packet size. This header is followed by optional words that include the stream identifier, the class identifier, time-of-day time stamp and a fractional-seconds time stamp. As an example, in the IF data packet, the header and the optional extended header are followed by the data payload and a 32-bit trailer word. In the context packet, the time stamp field is followed by a 32-bit context indicator field and the selected context fields.

The context packets provide a standardized language for relaying system attributes. The fields for these attributes have sufficient range and resolution to support future technology enhancements. Among others, some of these fields include the radio parameters such as RF and IF frequencies, bandwidth, power levels, internal delays, sampling rates, A/D overflow, temperature, and user-defined parameters.

Examples of the range and accuracy of several fields are shown in Table 1. Although these fields provide a large range and fine accuracy, they do not impact link bandwidth because the context packets are sent only when a change in the context information occurs.

A standard documentation package allows for the proper interpretation of system functionality from one vendor to another. The class documentation requirement allows for standard specifications of all aspects of a system or system components so that VRT system integrators can collect specifications from VRT component vendors and understand the precise operation of the entire system.

VRT-based SDR System

Pentek and other SDR providers are beginning to introduce products based on VRT. For example, DRS offers a suite of receiver products in the HF and VHF/UHF frequency ranges that provide digitized VRT output packets as a standard feature. The products utilize a variety of high-speed interfaces such as Gigabit Ethernet, FPDP, RapidIO and others as the link layer for VRT. The products come as VME/VXS boards, or portable modules.

An example system implementation utilizes the DRS Model SI-9147 dual-channel VHF/UHF VXS tuner, connected to the Pentek Model 4207 PowerPC VXS processor board. Integrating the VRT protocol into the product, provides the key capabilities to manage the different types of signal data packets available; to identify the DSP process that created the packets in the radio; to convey the signal routing through various DSP elements; and to relay the delay of the signal route. This information is critical for any location algorithm such as direction finding and beamforming.

Without a VRT type of mechanism, each vendor must provide a custom proprietary mechanism to identify and manage the different signal streams from a receiver, making it more difficult and costly to develop applications that can operate with different receivers.

The DRS Model SI-9147 has individual synthesizers for each channel. This enables multiple channels to be coherently tuned for direction finding and beamforming applications. Dual digitizers, built into the VME/VXS board, provide 16-bit resolution at an 80 MHz sampling rate. The output of each A/D is fed into an FPGA array that routes the data to the delay memory or to one of 36 ASIC DDCs as shown in Figure 2.

The DDCs are individually tunable to 32,768 different decimation settings to provide output bandwidths from 1 kHz to 17 MHz. Dozens of different signal data packet options can be selectively chosen. Loading the FPGAs with demodulation or other advanced DSP capabilities can easily lead to hundreds of output combinations from a single receiver.

Shown in Figure 3 the Pentek Model 4207 is a single or dual Freescale MPC8641 PowerPC processor VME/VXS board. It features a host of I/O support including dual optical Fibre Channel and gigabit interfaces. It also includes two PMC module sites that are equipped to accept switched-fabric XMC modules.

The board also features up to 4 GB of DDR2 SDRAM and a Xilinx Virtex-4 FPGA that supports gigabit serial fabrics and custom programming. The Pentek 4207 is optimized for embedded applications that require high-performance I/O and processing, such as wideband data acquisition and software radio.

The system shown in Figure 4 was developed to test and prove the feasibility of using VRT as a common transport protocol between these two boards. The system demonstrated the ability to first packetize and time stamp receiver data, then send it to the processor board over multiple lanes of the VXS backplane using serial RapidIO at 3.125 Gb/sec per lane.

Multichannel VRT System

A typical architecture of a multichannel system uses four SI-9147s to provide eight RF channels that send data to four or more Pentek 4207 processor cards as shown in Figure 5. The architecture uses a Serial Rapid IO switch card to enable dynamic routing of signals from any of the receiver cards to any of the signal processing cards and/or between signal processing cards. The number of combinations of routing signals through a signal processing flow has now increased an order magnitude, from the hundreds described before for a single SI-9147 to thousands of different combinations.

This system can be used for multifunction SDR architectures that can simultaneously implement radar, communications, electronic warfare, and surveillance functions. Utilizing a high-performance fabric, the receiver and DSP resources are dynamically allocated as needed to different functions, which will change based upon the mode of operation and the priority of each function. The typical modes of operation are search, direction finding, and beamforming.


With the rise in popularity of gigabit serial networks, VRT provides the mechanism needed to manage the vast variety of signal data and context packets that can be generated by SDR architectures. General-purpose receiver and DSP cards can now be utilized in multifunction architectures with many degrees of freedom regarding the routing of signals from the receiver to the DSP application for each function.

For different modes of operation within each application, the number of RF channels will dynamically change and impact the routing of signals from antenna to the DSP function. DRS and Pentek have developed COTS components that enable dynamic resource allocation based on the VRT standard. This example highlights the importance of the VRT standard to describe the signal flow of both analog and digital signals; to identify signals multiplexed onto a complex fabric; and to specify the attributes of each data-flow process, such as the receiver change in center frequency, bandwidth, power, and signal delay.


This article was excerpted from the paper The VITA Radio Transport As a Framework for Software Definable Radio Architectures by Robert Normoyle (DRS Signal Solutions, Gaithersburg, MD and Paul Mesibov (Pentek, Inc. Upper Saddle River, NJ This paper will be presented at the SDR Forum, October 26-30, 2008, Washington, DC.