Home > What's New > Upper Saddle River, NJ - December 15, 2009 |
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The Pentek Models 7753 and 7853 differ in the number of channels and PCIe lanes; eight channels and x16 wide PCIe interface in the former, four channels and x8 wide PCIe interface in the latter. Each module houses up to four or eight 200 MHz, 16-bit A/Ds, each equipped with its own wideband digital down converter (DDC).
"Because of the many built-in beamforming features, this is the first time we've chosen to include a specific application in the product name," said Rodger Hosking, vice president of Pentek. "Key features include programmable gain and phase for each channel, on-board power meters, multi-channel summation, and gigabit serial connectors for daisy chaining the summation across boards. These boards deliver a powerful, highly-scalable solution targeted for a wide range of beamforming applications in communications and radar."
"While each of our customer's requirements is different, much of the technology to solve these requirements is similar," said Bob Sgandurra, product manager, Pentek. He added, "These boards represent a unique balance of built-in, high-level functions common to all beamforming systems, while still maintaining an open architecture for our customers to address the specifics of their application. This approach saves development time and still provides the flexibility system engineers need."
By daisy chaining two or more boards through a pair of high-speed connectors mounted on the edge of each module, the beamforming chain can extend beyond the four or eight channels on each board. Xilinx's Aurora protocol provides an efficient x4 point-to-point data path between boards at 1.25 GB/sec. This connectivity supports large systems with numerous antennas.
In addition to the high speed x4 daisy chain, intermediate or final summation results are also available through the PCIe interface of each board for monitoring, recording or further analysis.
For antennas in an array, signals from a single source arrive at slightly different times, based on the distance between the source and each antenna. Beamforming involves compensating the gain and phase of each antenna signal before summation to line up the arrival phase for a particular angle of arrival from the source.
In other words, the gain and the phase of each channel can be adjusted so the antenna array is effectively 'steered' electronically. This provides a highly-agile directional sensitivity for the overall antenna array, and greatly enhances signal strength and signal/noise ratio for sources along the specified direction.
All of these essential beamforming functions are resident as factory-installed IP algorithms in the FPGAs of the 7753 and 7853.
These boards include power meters for each of the DDC channels that calculate the signal strength for each antenna. These measured values are extremely useful in calibrating the gain matching from channel to channel to optimize the beamforming result.
In addition, power threshold detectors for each channel can be set to generate an interrupt to the host processor if the energy level exceeds or falls below a programmed level. This dramatically offloads the processor for the signal monitoring and scanning requirements that are often part of beamforming systems.
To view the product features above, an easy-to-follow 10-minute beamforming subsystem presentation is available to download, please click here.
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