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Model 4954-440 GateFlow IP Core Library - Pulse Compression Core

This IP Core is no longer available. See Pentek GateFlow Installed IP Cores for available products.

Block Diagram




Life Cycle Management

Ordering & Warranty


  • IP Core only installed on Pentek FPGA board-level products
  • Supports Virtex-II , Virtex-II Pro, and Spartan-3 FPGAs
  • 155 MHz maximum clock with Virtex-II Pro FPGA
  • High-resolution block floating-point calculation using 16, 20, 24-bit math
  • Wide range of block sizes and data resolutions
  • FFT block sizes from 64 to 16384 data samples
  • Complex block floating point output formats: 16, 20, or 24-bit integer plus 6-bit exponent
  • Matched filter reference may be entered in time or frequency domain
  • Matched filter reference can be changed before processing each pulse or stored and reused
  • Matlab pulse compression utility functions included


Model 4954-440


Model 4954-440 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram

Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

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