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Model 4954-401 GateFlow IP Core Library - 1K Quad FFT Core

This IP Core is no longer available for individual purchase. It is available installed in Pentek Model 6235.

Block Diagram




Life Cycle Management

Ordering & Warranty


  • IP Core only installed on Pentek FPGA board-level products
  • Ultra-high-speed, high-performance 1024- and 4096-point complex FFTs
  • Supports Virtex-II and Virtex-II Pro FPGAs
  • Fits in the Virtex-II XC2V3000 and larger devices
  • Four input and output points per clock cycle
  • Flexible input stage accepts one, two or four input streams
  • 4096-point FFT calculation every 1024 clock periods (7.31 us at 140MHz)
  • 1024-point FFT calculation every 256 clock periods (1.83 ┬Ás at 140MHz)
  • Highly distributed arithmetic
  • 16-bit complex or real input data
  • Selectable 16-bit complex or unsigned power output data
  • Supports continuous input and output data
  • Selectable Hanning window function
  • Naturally ordered input and output data
  • Operates in continuous output or triggered oneshot mode


Model 4954-401


Model 4954-401 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram

Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

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