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Upper Saddle River, NJ - September 26, 2016 - Pentek, Inc., today introduces the new JadeTM family of XMC products. Evolved from the proven designs of the Pentek Cobalt® and Onyx® architectures, Jade is based on the Xilinx flagship Kintex UltraScale FPGA, which significantly raises the digital signal processing (DSP) performance by over 50%. Equally impressive are reductions in cost by 39% and power dissipation by 18%.
The Kintex UltraScale FPGA site can be populated with a range of FPGAs to match the specific requirements of the processing task, spanning the KU035 through KU115. The KU115 features 5520 DSP48E2 slices and is ideal for modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.
The Jade architecture supports an optional 5 GB bank of DDR4 SDRAM memory. User-installed IP along with the Pentek supplied DDR4 controller core within the FPGA can take advantage of the memory for custom applications. The board features a Gen.3 x8 PCIe interface along with eight additional gigabit serial lanes and LVDS general purpose I/O for custom solutions.
As the central feature of the Jade architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering, and memory control. The Jade architecture organizes the FPGA as a container for data processing applications where each function exists as an intellectual property (IP) module.
The NavigatorTM Design Suite was designed from the ground up to work with Pentek's new Jade architecture and provides an unparalleled plug-and-play solution to the complex task of IP and control software creation and compatibility. The Navigator Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (Board Support Package) for creating host applications. Users are able to work efficiently at the API level for software development and with an intuitive graphical interface for IP design.
"Our new Jade architecture gives our customers unprecedented levels of performance at significantly lower product cost," said Rodger Hosking, vice president of Pentek. "We also developed new software development tools to align with the latest industry standards and Xilinx development tools, providing a more intuitive and productive development environment."
The first product to be introduced using the Jade architecture is the Model 71861, an XMC module with four 200 MHz A/D channels and programmable multiband DDCs (digital downconverters). As with all Jade products, the Model 71861 is based on the Xilinx Kintex UltraScale FPGA family with FPGA choices to match price, power, and processing performance needs. In addition to XMC, this product is also available in PCIe, 3U & 6U VPX, AMC, and 3U & 6U cPCI form factors, with versions for both commercial and rugged environments.
Today's complex FPGAs require intuitive development tools to help manage and simplify IP development. Xilinx's Vivado Design Suite® includes IP Integrator, the industry's first plug-and-play IP integration design environment. Built around a graphical block diagram interface, IP Integrator allows IP developers to leverage existing IP by importing it into their block diagram design. Pentek's Navigator FDK provides complete data acquisition and processing IP for a specific Jade board. When the design is opened in Vivado's IP Integrator, the developer can access every component of the Pentek design, replacing or modifying blocks as needed for a specific application.
All blocks use industry standard AXI4 interfaces providing a well-defined format for custom IP to connect to the rest of the design. Each Navigator/Jade design includes User Blocks in the data flow path, ideal for inserting custom processing IP. Pentek IP blocks can be quickly integrated with IP from nearly any other source.
"We are pleased that Pentek has adopted Vivado's industry standard, plug-and-play IP integration design environment", said Ramine Roane, Sr. Director of Software product marketing at Xilinx. "This flow enables customers to rapidly integrate connectivity and processing IP from Xilinx and Pentek, with their own custom processing IP".
The Navigator FDK includes complete documentation, test benches, and full VHDL source for developers who desire complete access to the IP. In addition to the IP specific to the supported Jade board, Navigator also includes processing blocks for some of the most commonly used algorithms.
The companion product to the Navigator FDK is the Pentek Navigator BSP. While Navigator FDK provides a streamlined path for creating or modifying new IP for the Pentek hardware, the Navigator BSP enables complete operational control of the hardware and all IP functions in the FPGA.
The Pentek Navigator BSP is available for Windows and Linux operating systems. It provides a well defined API, allowing developers to create their applications at a high level of abstraction. Built on C-language libraries, it contains a complete suite of initialization, control and status functions, as well as a rich set of precompiled, ready-to-run-examples, accelerating application development. Navigator BSP also includes the Signal Analyzer, a full-featured analysis tool that displays data in time and frequency domains.
With a Pentek Model 8266 SPARK PC development system or a Model 8264 SPARK 6U VPX or Model 8267 SPARK 3U VPX development system, work can begin immediately on applications. A SPARK system saves engineers the time and expense associated with building and testing a development system and ensures optimum performance of Pentek boards. All SPARK development systems come with software and hardware installed, fully cabled and cooled, and ready for immediate operation. In many applications the SPARK development system can become the final deployed application platform.
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