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Pentek, Inc., with its proven track record as a pioneer in software radio innovation, today introduced its Model 7151 high-performance, high-resolution software radio module. Four 200 MHz 16-bit A/D converters feed a proprietary FPGA IP core that delivers 256 channels of digital down conversion. Particularly well suited for GSM cell-phone monitoring and signal-intelligence applications, the Model 7151 leads the industry with the best resolution and highest channel density in the market today.
With independent frequency tuning for each of the 256 DDC channels, the Model 7151 can down-convert any signal within any of the four digitized 100 MHz input bands, significantly enhancing the efficiency and diversity of signal-intelligence applications. Arranged in four banks of 64 DDC channels, each bank can be configured for a unique output signal bandwidth to accommodate applications requiring mixed signal types or multiple modulation schemes. Each DDC bank can be independently sourced from any one of the four A/D converters, which are typically assigned to specific antennas. As a result, the Model 7151 affords the engineer extreme flexibility for simultaneously capturing hundreds of signals spanning a wide range of modulation types, signal bandwidths and antenna sources.
"With its highly optimized 256-channel DDC IP core engine, the Model 7151 represents an entire software radio front end, boasting a channel density eight times higher than any other competing product in the marketplace. The Model 7151 is fully supported with drivers and it comes ready to use with the FPGA code already developed and installed. Not only does the 7151 module reduce development time and risks, it also saves designers space, power and costs in their software radio systems," says Rodger Hosking, vice president, Pentek. "Plus, the flexible decimation settings, input selections and tuning options, all unique to the Model 7151, provide engineers with unprecedented choices to suit specific applications," Hosking adds.
The front end accepts four +10 dBm, full-scale analog RF or IF inputs on front-panel SMC connectors into 50 ohms, with transformer couplings to four 200 MHz, 16-bit A/D converters. The digitized outputs are delivered into a Xilinx Virtex-5 FPGA for routing, formatting and DDC signal-processing operations. The 200 MHz A/Ds accommodate input signal bandwidths of up to 100 MHz, representing a 37% increase over previous Pentek modules.
The Model 7151 employs an advanced FPGA-based DDC engine comprised of four identical 64-channel DDC banks. Four independently controllable input multiplexers select one of the four A/Ds as the input source for each DDC bank. In this way, many different configurations can be achieved, including one A/D driving all 256 DDC channels and each of the four A/Ds driving its own DDC bank. Each of the 256 DDCs has an independent 31-bit tuning frequency setting that ranges from DC to ?s/2, where ?s is the A/D sampling rate.
All of the 64 channels within a bank share a common decimation setting that can range from 128 to 1024, programmable in steps of 64. For example, with a sampling rate of 200 MHz, the available output bandwidths range from 156 kHz to 1.25 MHz.
Each 64-channel bank can have its own unique decimation setting supporting as many as four different output bandwidths on the board. This flexibility lets customers map the DDC to their own particular application.
The decimating filter for each DDC bank accepts a unique set of user-supplied 18-bit coefficients. The 80% default filters deliver an output bandwidth of 0.8*?s/N, where N is the decimation setting. The rejection of adjacent-band components within the 80% output bandwidth is better than 100 dB. Each DDC delivers a complex output stream consisting of 24-bit I and 24-bit Q samples at a rate of ?s/N.
Any number of channels can be enabled with each bank, selectable from 0 to 64. Each bank includes an output sample interleaver that delivers a channel-multiplexed stream for all enabled channels within the bank.
Four output MUXs can be independently switched to deliver either A/D data or DDC data into each of the four output FIFOs. This allows users to view either the wideband A/D data or the narrowband DDC data, depending on the application. Each of the output FIFOs operates at its own input rate and output rate to support different DDC decimation settings between the banks and efficient block transfers to the PCI bus.
The 7151 PMC module can be attached to any PMC carrier board. The Model 7651 is a PCI-board version, and it can readily be plugged into a desktop PC. For CompactPCI systems, the 7251 is a 6U module and the 7351 is a 3U module. Pentek will soon be announcing PCI Express versions of the module as well.
What's more, a 4207 processor board with its two mezzanine sites can support two 7151 PMCs delivering 512 DDC channels in a single VME slot ? an extraordinarily powerful single-slot solution. Software and software-support packages are available for Linux, Windows and VxWorks operating systems.
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