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Model 5891 Programmable Multifrequency Clock Synthesizer - 6U VPX

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Block Diagram




Development Systems


Life Cycle Management

Ordering & Warranty


  • Simultaneous synthesis of up to 10 different clocks
  • 16 SMC clock outputs
  • Typical phase noise: -105 dBc/Hz @ 1 kHz offset
  • All clocks are phase-locked to input reference signal
  • Input reference frequency of 5 to 100 MHz
  • Eight programmable VCXOs with 32-bit tuning resolution
  • Output clocks of 1, 2, 4, 8, or 16 submultiples of VCXO base frequencies
  • Output clock frequencies between 50 and 700 MHz
  • Control and status over the VPX backplane


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Model 5891


Model 5891 Block Diagram

Pricing and Availability

For the latest pricing, delivery and available options, please fill out this form and your request will be delivered to the appropriate department. To learn more about our products or to discuss your specific application please email our sales department at, contact your local representative or Pentek directly:

Mario Schiavone
Sales Director
Pentek, Inc.
One Park Way
Upper Saddle River, NJ 07458
Tel: +1 (201) 818-5900
Fax: +1 (201) 818-5904
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Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
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For Manual
Model 4994A ReadyFlow Board Support Packages (BSPs) for Linux for Model 5891
Contact Pentek
For Manual
Model 4995A ReadyFlow Board Support Packages (BSPs) for Windows for Model 5891

Software Products - ( top )

4994A 191 ReadyFlow Board Support Packages (BSPs) for Linux
4995A 191 ReadyFlow Board Support Packages (BSPs) for Windows