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Home > Products > Model 6821-422 215 MHz A/D and Digital Receiver Installed Core - VME Printer Friendly Version

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Model 6821-422 215 MHz A/D and Digital Receiver Installed Core - VME

Block Diagram

Data Sheet

Manuals

Software

Literature

Life Cycle Management

 
  • AD9430 12-bit 215 MHz A/D Converter
  • Dual GateFlow Core 422, 296 MHz wideband DDCs, factory installed
  • Four sets of 18-bit user-programmable FIR filter coefficients
  • Four FPDP or FPDP II front panel outputs
  • FIFO buffering for real-time recording
  • Xilinx Virtex-II Pro FPGAs
  • Ruggedized and conduction-cooled versions

 

Model 6821-422

 

Model 6821-422 Block Diagram



Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No. Type Description Revision/Date
800.68211 Operating Manual 215 MHz A/D with 296MPSP WB DDR Installed Core A.2 (6/18/2010)
800.68212 Addendum Model 6821-Option 422 Unsupported Features A (6/19/2010)
801.68210 User's Guide Model 4999 Option 821, ReadyFlow Board Support Libraries for Model 6821 2.2 (12/8/2005)

Software - ( top )

Software Products
Model Option Description
4999 821 ReadyFlow Board Support Package

Literature - ( top )




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