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Model 6821-422 215 MHz A/D and Digital Receiver Installed Core

Block Diagram

Data Sheet

Manuals

Software

Technical Info

Knowledgebase

ReadyFlow

Literature

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Presentations

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Life Cycle Management
 
  • AD9430 12-bit 215 MHz A/D Converter
  • Dual GateFlow Core 422, 296 MHz wideband DDCs, factory installed
  • Four sets of 18-bit user-programmable FIR filter coefficients
  • Four FPDP or FPDP II front panel outputs
  • FIFO buffering for real-time recording
  • Xilinx Virtex-II Pro FPGAs
  • Ruggedized and conduction-cooled versions
 

Model 6821-422

Model 6821-422 Block Diagram


Hardware and Software Manuals - ( top )

Part No. Type Description Revision/Date
800.68211 Operating Manual 215 MHz A/D with 296MPSP WB DDR Installed Core A (5/6/2008)
800.68212 Addendum Model 6821-Option 422 Unsupported Features Preliminary (9/6/2005)

Software - ( top )

Software Products
Model Option Description
4999 821 ReadyFlow Board Suppot Package

Technical Info - ( top )

Literature - ( top )

Pipelines - ( top )

Presentations - ( top )

Industry Articles - ( top )

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