Pentek GateFlow FPGA Design Kit

FPGAs (Field Programmable Gate Arrays) continue to grow in popularity due to their constantly increasing processing capabilities and new software tools that facilitate custom algorithm development. FPGAs are often coupled to high-speed A/Ds because they can perform real-time digital signal processing faster than general purpose processors. In addition, they offer very high speed interfaces to other system components including the new high-speed serial switched fabrics.

Evolution of Xilinx FPGAs

The Xilinx devices used in current Pentek products include the Virtex-E, the Virtex-II, the Virtex-Pro and the
Virtex-4.

The Virtex-E family includes a generous mix of configurable logic blocks, logic cells, system gates and block memory.
The Virtex-II family added buit-in hardware multipliers—a major benefit for signal processing that supports digital filters, averagers, demodulators and FFTs.
The Virtex-II Pro family dramatically increased the number of multipliers and ushered embedded PowerPC microcontrollers and RocketIO gigabit serial transceivers.
The Virtex-4 family offers various combinations of significantly higher resource densities with reduced power dissipation.

Many FPGA-based products from Pentek offer a significant percentage of unused resources suitable for implementing user-defined algorithms.

The Pentek Model 4953 GateFlow FPGA Design Kit provides the user with design information, software files and utilities for extending FPGA functions in these products. Users can implement a variety of custom preprocessing functions such as convolution, framing, pattern recognition, decompression, FFT, delay, beamforming, decoding, time stamping, averaging, and summation.

GateFlow FPGA Design Kit Data Sheet and Documentation

What's included in the Design Kit

Each Model 4953 GateFlow FPGA Design Kit includes the following:

The software project used in Xilinx Foundation to create all the standard factory functions of the product including device and bus interfaces, data formatting, clocking, and control
All VHDL source code modules for the standard factory configuration
Instructions and utilities for loading a new user-defined configuration to the FPGAs via serial download, parallel upload from the baseboard processor, or custom EEPROM configuration
Instructions for implementing a software FPGA project

Using the FPGA Design Kit

The GateFlow FPGA Design Kit is intended for the programming of predefined user blocks located in the data flow path specifically reserved for custom applications. These predefined blocks protect users from inadvertently altering base functionality. This is beneficial to the average user whose applications can utilize most of the reference design structure with additional functions in the data path.

Pentek recommends user programming be limited to the predefined user blocks to maintain base functionality. However, for more complex requirements, sufficient information is supplied in the kit for the user to modify, add to, or replace default board functions if necessary. Default configuration files are included with the Design Kit should it be necessary to restore standard factory configuration.

FPGA Design Kit User Block

Shown on this page is the block diagram of a typical software radio module. The diagram includes the FPGA and external hardware devices connected to it.

The blocks inside the FPGA are VHDL code modules that handle the standard factory functions and interfaces. The User Block is a VHDL module that sits in the data path with pin definitions for input, output, status, control and clocks.

In the standard Design Kit product, the User Block is configured as a straight wire between the input and output ports. By creating an IP core or a custom algorithm inside the block that conforms to the pin definition, the user will have a low-risk experience in recompiling and installing the custom code. Since Pentek provides source code for all the modules, changes outside the user block can also be made by the user.

FPGA Design Kit Project Files

The GateFlow Design Kit is intended for use with the Xilinx ISE Foundation Tool Suite. The user should be trained in and be familiar with this tool and general FPGA design principles.

The Design Kit installs as a complete project file within the ISE environment and includes all the project files that Pentek engineers used to create the standard product. Included are configuration and definition files, VHDL source code, JTAG definition files and I/O block diagrams. The FPGA Design Kit also includes several helpful utilities and a very important resource, the FPGA Loader Utility.

FPGA Design Kit Loader Utility

Normally, the FPGA is loaded from a nonvolatile EEPROM with the standard factory configuration code when the product is powered up.

The FPGA Loader Utility allows the processor associated with the FPGA product to reconfigure the FPGA as a software task, effectively overwriting the factory configuration code. As a result, there is no need to turn off power, no need to disassemble the board or system and no need to attach any special cables or harnesses to the board.

The FPGA can be reconfigured in this manner during initialization to install custom operational modes and features. It can also facilitate product upgrades and enhancements that can dramatically extend product longevity.

The loader utility is especially useful as a runtime resource. During operation, a user can select a new mode of operation, and cause a new FPGA configuration upload. This new mode will then run as part of the runtime executable code.

The FPGA Loader Utility:

Executes on host or baseboard processor.
Supports easy FPGA reconfiguration for adaptive processing during runtime.
Supports easy FPGA reconfiguration for field upgrades.
Eliminates the need to disassemble the system to modify hardware.
Extends product longevity.

PC Requirements

Recommended workstation hardware:

XCV600E FPGAs: Pentium processor with 512 MB RAM and an additional 512 MB of virtual memory
XC2V1000 FPGAs: Pentium processor with 512 MB RAM and an additional 512 MB of virtual memory
XC2V3000 FPGAs: Pentium processor with 2 GB RAM and an additional 2 GB of virtual memory
XC2VP20 FPGAs: Pentium processor with 1 GB RAM and an additional 1 GB of virtual memory
XC2VP50, XC2VP70 FPGAs: Pentium processor with 2 GB RAM and an additional 2 GB of virtual memory
XC2VP100 FPGAs: Pentium processor with 3 GB RAM and an additional 3 GB of virtual memory
XC4VSX55, XC4VFX60 FPGAs: Pentium processor with 1 GB RAM and an additional 1 GB of virtual memory
XC4VFX100 FPGAs: Pentium processor with 2 GB RAM and an additional 2 GB of virtual memory

Software Tools and Cables

Xilinx Software tools and cables should be purchased directly from Xilinx. Pentek recommends Xilinx Foundation ISE Software (contact Pentek for supported versions). For JTAG programming or serial download, Pentek recommends Xilinx Parallel Cable IV.